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SoNIC: Precise Realtime Software Access and Control of Wired Networks
Ki Suh Lee, Han Wang, and Hakim Weatherspoon, Cornell University
The physical and data link layers of the network stack contain valuable information. Unfortunately, a systems programmer would never know. These two layers are often inaccessible in software and much of their potential goes untapped. In this paper we introduce SoNIC, Software-defined Network Interface Card, which provides access to the physical and data link layers in software by implementing them in software. In other words, by implementing the creation of the physical layer bitstream in software and the transmission of this bitstream in hardware, SoNIC provides complete control over the entire network stack in realtime. SoNIC utilizes commodity off-the-shelf multi-core processors to implement parts of the physical layer in software, and employs an FPGA board to transmit optical signal over the wire. Our evaluations demonstrate that SoNIC can communicate with other network components while providing realtime access to the entire network stack in software. As an example of SoNIC’s fine-granularity control, it can perform precise network measurements, accurately characterizing network components such as routers, switches, and network interface cards. Further, SoNIC enables timing channels with nanosecond modulations that are undetectable in software.
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author = {Ki Suh Lee and Han Wang and Hakim Weatherspoon},
title = {{SoNIC}: Precise Realtime Software Access and Control of Wired Networks},
booktitle = {10th USENIX Symposium on Networked Systems Design and Implementation (NSDI 13)},
year = {2013},
isbn = {978-1-931971-00-3},
address = {Lombard, IL},
pages = {213--225},
url = {https://www.usenix.org/conference/nsdi13/technical-sessions/presentation/lee_ki},
publisher = {USENIX Association},
month = apr
}
Presentation Video
Presentation Audio
by Luigi Rizzo
SONIC presents an interesting example of how bit-level processing of a 10 Gbit/s stream at the physical level can be done in software, using a standard (fast) CPU and a little bit of specialized hardware (FPGA and SFP converter) for the electrical to digital conversion,serialization, and timing.
The paper addresses a problem which most people (including myself) would think "cannot be solved in software -- data rate is too high." In this sense I find the paper is especially interesting and instructive, as it shows how to split functionality between hardware (fast, but hard to develop for) and a general purpose CPU and OS (less efficient, but a lot more convenient in terms of development) to build a very high performance system, from the high level software interface (ioctl()) down to the low level PCIe handling.
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