Check out the new USENIX Web site. next up previous
Next: Caching Up: SARC: Sequential Prefetching in Previous: SARC: Sequential Prefetching in

Introduction

Moore's law indicates that processor speed grows at an astounding 60% yearly rate. In contrast, disks which are electro-mechanical devices have improved their access times at a comparatively meager annual rate of about 8%. Moreover, disk capacity grows 100 times per decade, implying fewer available spindles for the same amount of storage [1]. These trends dictate that a processor must wait for increasingly larger number of cycles for a disk read/write to complete. A huge amount of performance literature has focused on hiding this I/O latency for disk bound applications.



Subsections

Binny Gill 2005-02-14