Table 1: ADL Support for Architectural
Domains
|
ARCH.
DOMAIN
ADL
|
Represent.
|
Design
Process
Support
|
Static
Analysis
|
Dynamic
Analysis
|
Spec-Time
Evolution
|
Exec-Time
Evolution
|
Refinement
|
Trace.
|
Simulation/
Executability
|
ACME
|
explicit config.;
"weblets" |
none |
parser |
none |
application
families |
none |
rep-maps across
levels |
textual
<->
graphical
|
none |
Aesop
|
explicit config.;
graphical notation; types distinguished iconically |
syntax directed
editor; specialized editors for visualization classes |
parser; style-specific
compiler; type, cycle, resource conflict, and scheduling feasibility checker |
none |
behavior-preserving
subtyping of components and connectors |
none |
none |
textual
<->
graphical
|
build tool
constructs system glue code in C for pipe-and-filter style |
C2
|
explicit config.;
graphical notation; process view; simulation; event filtering |
non-intrusive,
reactive design critics and to-do lists in Argo |
parser; critics
to establish adherence to style rules and design heuristics |
event filtering |
multiple subtyping
mechanisms; allows partial architectures |
pure dynamism:
element insertion, removal, and rewiring |
none |
textual
<->
graphical
|
class framework
enables generation of C/C++, Ada, and Java code |
Darwin
|
implicit config.;
graphical notation; hierarchical system view |
automated addition
of ports; propagation of changes across bound ports; property dialogs |
parser; compiler |
"what if" scenarios
by instantiating parameters and dynamic components |
none |
constrained
dynamism: runtime replication of components and conditional configuration |
none |
textual
<->
graphical
|
compiler generates
C++ code |
MetaH
|
implicit config.;
graphical notation; types distinguished iconically |
intrusive,
reactive graphical editor |
parser; compiler;
schedulability, reliability, and security analysis |
none |
none |
none |
none |
textual
<->
graphical
|
compiler generates
Ada code (C code generation planned) |
Rapide
|
implicit config.;
graphical notation; animated simulation; event filtering |
none |
parser; compiler;
constraint checker to ensure valid mappings |
event filtering
and animation |
inheritance
(structural subtyping) |
constrained
dynamism: conditional configuration and dynamic event generation |
refinement
maps enable comparative simulations of architectures at different levels |
textual
<->
graphical;
constraint checking across refinement
levels |
simulation
by generating event posets; system construction in C/C++, Ada, VHDL, and
Rapide |
SADL
|
explicit config. |
none |
parser; relative
correctness of architectures w.r.t. a refinement map |
none |
component and
connector refinement via pattern maps |
none |
maps enable
correct refinements across levels |
refinement
across levels |
none |
UniCon
|
explicit config.;
graphical notation |
proactive GUI
editor invokes language checker |
parser; compiler;
schedulability analysis |
none |
none |
none |
none |
textual
<->
graphical
|
compiler generates
C code |
Wright
|
explicit config. |
none |
parser; model
checker for type conformance; deadlock analysis of connectors |
none |
type conformance
for behaviorally related protocols |
none |
none |
none |
none |