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The Implications of Shared Data Synchronization Techniques on Multi-Core Energy Efficiency
Ashok Gautham, IIT Madras; Kunal Korgaonkar, IIT Madras and IBM Research; Patanjali SLPSK, Shankar Balachandran, and Kamakoti Veezhinathan, IIT Madras
Shared data synchronization is at the heart of the multi-core revolution since it is essential for writing concurrent programs. Ideally, a synchronization technique should be able to fully exploit the available cores, leading to improved performance. However, with the growing demand for energy-efficient systems, it also needs to work within the energy and power budget of the system. In this paper, we perform a detailed study of the performance as well as energy efficiency of popular shared-data synchronization techniques on a commodity multi-core processor. We show that Software Transactional Memory (STM) systems can perform better than locks for workloads where a significant portion of the running time is spent in the critical sections. We also show how power-conserving techniques available on modern processors like C-states and clock frequency scaling impact energy consumption and performance. Finally, we compare the performance of STMs and locks under similar power budgets.
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author = {Ashok Gautham and Kunal Korgaonkar and Patanjali SLPSK and Shankar Balachandran and Kamakoti Veezhinathan},
title = {The Implications of Shared Data Synchronization Techniques on {Multi-Core} Energy {Efficiency}},
booktitle = {2012 Workshop on Power-Aware Computing and Systems (HotPower 12)},
year = {2012},
address = {Hollywood, CA},
url = {https://www.usenix.org/conference/hotpower12/workshop-program/presentation/Gautham},
publisher = {USENIX Association},
month = oct
}
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