Workshop Program

Major portions of the US electric grid are half a century old, and compared to other infrastructure, the adoption of new technology into the US grid has been relatively slow. This slow adoption of technology compared to other sectors such as telecommunications has been attributed to the reason that the existing grid is 99.97% reliable and therefore should not need upgrading. However, its structure and topology are relatively inflexible since its underlying framework was designed assuming unidirectional flow of power, control, and information. As a result of this inflexible structure, integrating common renewable energy sources such as solar and wind into the grid is prohibitively expensive and unwieldy. Also, electric vehicles, now having been introduced in several markets of the country, especially California, present major challenges when plugged into the grid. A smart grid would allow two-way power flow, two-way communications flow, and two-way control flow. This will allow the grid to be more flexible, smart, self-healing, resilient, and efficient. To enable such a grid, a host of advanced technologies such as information technology, wireless and mobile devices, sensor and control systems, etc., have to be architected and integrated into the existing grid. Research at UCLA’s Smart Grid Energy Research Center (SMERC) focuses on the integration capability of such technologies between the medium voltage distribution grid and the consumer’s interface into the grid.Research is being performed on the creation of smart grid services that are aggregated from consumers and offered through a distribution network in a smart grid. The fundamental idea is to aggregate services at the consumer’s level with the permission and control of the consumer and then to enable these aggregated services into utility-grade offerings. For example, if sufficient numbers of electric vehicle (EV) owners allow their local utility to extract power from their EVs during peak-demand periods, the utility should be willing to offer customers incentives to do so. An intermediate enterprise that aggregates 100 EVs with a nominal 6.6KW charging capacity per EV would be able to offer a 0.66MW Demand Response service into the local regulatory markets. Beyond this service, vehicles with bi-directional power flow can theoretically offer up to 10 times the power while discharging for short periods of time, which would imply a 6.6MW short-term, aggregation service capability. With 1000 EVs in a region, this capacity can in principle reach 66MW, which is approximately UCLA’s peak power consumption. With about 20,000 cars parked at UCLA on a typical day, if in the future 5% of its vehicles were EVs, UCLA could participate in a short time period micro-grid market and should be able to completely operate off-the-grid for a window of time without cutting power consumption in its facilities. UCLA SMERC has been developing a wireless monitoring and control platform called WINSmartGridTM (Wireless Internet Smart Grid) that is currently being deployed in parts of UCLA called the UCLA Smart Grid Living Lab. Also, UCLA SMERC is a participant in a DOE-ARRA regional demonstration project and is experimenting with research concepts in Automated Demand Response, EV Integration (G2V and V2G), and micro-grids using the WINSmartGridTM platform within the Living Lab. The research platform accepts inputs from electrical loads such as EVs or air conditioners; ambient condition sensors such as temperature, humidity, or occupancy sensors; and grid operator/grid condition input. It is the platform on which an EV monitoring, aggregation, and control network has been developed. Research is being performed on models of aggregation under constraints of user, utility, and facility; verification of such models; network architecture and performance verification for regulatory/market service; and wireless-based monitoring and control systems and middleware in smart grids. The talk will present research and technical opportunities and challenges, upcoming market opportunities and their challenges, and current research progress at UCLA’s Smart Grid Energy Research Center.

Dr. Rajit Gadh is a Professor at the Henry Samueli School of Engineering and Applied Science at UCLA, and the Founding Director of the UCLA Smart Grid Energy Research Center or SMERC. He is also Founder and Director of the Wireless Internet for Mobile Enterprise Consortium, or WINMEC, of which major organizations including Boeing, ETRI, Hewlett Packard, Hughes Network Systems, Intel, ISBM-Italy, InterDigital, ITC Infotech, Lucent Technologies, Microsoft, Motorola, Northrop Grumman, Qualcomm, Raytheon, Sprint, Siemens, TCS, Verizon Wireless, and others have been sponsors/members over the past several years.

Dr. Gadh's research interests include smart grid architectures, smart wireless communications, sense and control for demand response, micro-grids and electric vehicle integration into the grid, mobile multimedia, wireless and RFID middleware, RFID and wireless sensors for tracking assets, RF-sensor-control interfaces,and visualization. He has over 150 papers in journals, conferences, and technical magazines, and 3 patents granted.

He has a Doctorate degree from Carnegie Mellon University (CMU), a Masters from Cornell University, and a Bachelor’s degree from IIT Kanpur. He has taught as a visiting researcher at UC Berkeley; has been an Assistant, Associate, and Full Professor at the University of Wisconsin-Madison; and did his sabbatical as a visiting researcher at Stanford University for a year. He has won several awards from the NSF (CAREER award, Research Initiation Award, NSF-Lucent Industry Ecology Award, and GOAL-I Award), SAE (Ralph Teetor Award), IEEE (second best student paper at WTS), ASME (Kodak Best Technical Paper Award), AT&T (Industrial Ecology Fellow Award), Engineering Education Foundation (Research Initiation Award), William Wong Fellowship Award from University of Hong-Kong, etc., and other accolades in his career. He is on the Editorial Board of ACM Computers in Entertainment and the CAD Journal. He has lectured and given keynote addresses worldwide in countries such as Belgium, Brazil, England, France, Germany, Holland, Hong Kong, India, Italy, Japan, Mexico, Singapore, Spain, Taiwan, and Thailand.

Dr. Gadh has a strong background in creating technology partnerships with industry. His industrial background started prior to his academic career, when he worked as an engineer and as a technology lead for two software startup companies. He enjoys advising students in their quest towards technology startups. In collaboration with his students and researchers, he has co-founded two technology startups.

A large portion of radio energy in smartphones is wasted during a special waiting period, known as the tail time, after a transmission is completed. In order to save the wasted energy during the tail time, it is important to accurately predict whether a subsequent transmission will occur in the tail period. In this paper, we propose a novel general-purpose predictive dormancy technique, called Personalized Diapause (PD). By automatically extracting meaningful network activities as network contexts, our proposed technique takes advantage of per-user usage characteristics of each network context in deciding when to release a radio connection within the tail time. Our experimental results using real network usage logs from 25 users show that PD can save the radio energy consumption by up to 36% with about 10% reconnection increase. 

The Android OS conserves battery life by aggressively turning off components, such as screen and GPS, while allowing application developers to explicitly prevent part of this behavior using the WakeLock API. Unfortunately, the inherent complexity of the Android programming model and developer errors often lead to improper use of WakeLocks that manifests as no-sleep bugs. To mitigate this problem, we have implemented a tool that verifies the absence of this kind of energy bugs w.r.t. a set of WakeLock specific policies using a precise, inter-procedural data flow analysis framework to enforce them. We run our analysis on 328 Android apps that utilize WakeLocks, verify 145 of them and shed light on the locking patterns employed and when these can be harmful. Further, we identify challenges that remain in order to make verification of Android apps even more precise. 

Shared data synchronization is at the heart of the multi-core revolution since it is essential for writing concurrent programs. Ideally, a synchronization technique should be able to fully exploit the available cores, leading to improved performance. However, with the growing demand for energy-efficient systems, it also needs to work within the energy and power budget of the system. In this paper, we perform a detailed study of the performance as well as energy efficiency of popular shared-data synchronization techniques on a commodity multi-core processor. We show that Software Transactional Memory (STM) systems can perform better than locks for workloads where a significant portion of the running time is spent in the critical sections. We also show how power-conserving techniques available on modern processors like C-states and clock frequency scaling impact energy consumption and performance. Finally, we compare the performance of STMs and locks under similar power budgets. 

The variability in performance and power consumption is slated to grow further with continued scaling of process technologies. While this variability has been studied and modeled before, there is lack of empirical data on its extent, as well as the factors affecting it, especially for modern general purpose microprocessors. Using detailed power measurements we show that the part to part variability for modern processors utilizing the Nehalem microarchitecture is indeed significant. We chose six Core i5-540M laptop processors marketed in the same frequency bins—thus presumed to be identical—and characterized their power consumption for a variety of representative single-threaded and multi-threaded application workloads. Our data shows processor power variation ranging from 7%-17% across different applications and configuration options such as Hyper-Threading and Turbo Boost. We present our hypotheses on the underlying causes of this observed power variation and discuss its potential implications. 

Graphics processing units (GPUs) provide significant improvements in performance and performance-per-watt as compared to traditional multicore CPUs. This energy-efficiency of GPUs has facilitated the use of GPUs in many application domains. Albeit energy efficient, GPUs consume non-trivial power independently of CPUs. Therefore, we need to analyze the power and performance characteristic of GPUs and their causal relation with CPUs in order to reduce the total energy consumption of the system while sustaining high performance. In this paper, we provide a power and performance analysis of GPU-accelerated systems for better understandings of these implications. Our analysis on a real system discloses that system energy can be reduced by 28% retaining a decrease in performance within 1% by controlling the voltage and frequency levels of GPUs. We show that energy savings can be achieved when GPU core and memory clock frequencies are appropriately scaled considering the workload characteristics. Another interesting finding is that voltage and frequency scaling of CPUs is trivial for total system energy reduction, and even should not be applied in state-of-the-art GPU-accelerated systems. We believe that these findings are useful to develop dynamic voltage and frequency scaling (DVFS) algorithms for GPU-accelerated systems.