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TECHNICAL SESSIONS
Session papers are available to workshop registrants immediately and to everyone beginning March 30, 2009.
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| Sunday, March 29 | Monday, March 30 | Tuesday, March 31
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| Sunday, March 29 |
| 6:00 p.m.–9:00 p.m. |
Sunday |
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Opening Reception
Organized by the Par Lab at the University of California, Berkeley, in Soda Hall, just 2 miles from the Claremont Hotel. Details will be sent via email.
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| Monday, March 30 |
| 7:45 a.m.–8:45 a.m. Continental Breakfast |
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| 8:45 a.m.–9:00 a.m. |
Monday |
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Introduction and Opening Remarks
HotPar '09 Program Co-Chairs: Alexandra Fedorova, Simon Fraser University; Jim Larus, Microsoft
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| 9:00 a.m.–11:00 a.m. |
Monday |
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Challenges and Opportunities of Heterogeneous Hardware
A Case for Machine Learning to Optimize Multicore Performance
Archana Ganapathi, Kaushik Datta, Armando Fox, and David Patterson, University of California at Berkeley
Paper in HTML | PDF
Hardware Parallelism vs. Software Parallelism
John A. Chandy and Janardhan Singaraju, University of Connecticut
Paper in HTML | PDF | Slides
Embracing Heterogeneity—Parallel Programming for Changing Hardware
Michael D. Linderman, James Balfour, Teresa H. Meng, and William J. Dally, Stanford University
Paper in HTML | PDF
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| 11:00 a.m.–11:30 a.m. Break |
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| 11:30 a.m.–1:30 p.m. |
Monday |
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Models and Paradigms I
Parallel Programming Must Be Deterministic by Default
Robert L. Bocchino Jr., Vikram S. Adve, Sarita V. Adve, and Marc Snir, University of Illinois at Urbana-Champaign
Paper in HTML | PDF | Slides
Opportunistic Computing: A New Paradigm for Scalable Realism on Many-Cores
Romain Cledat, Tushar Kumar, Jaswanth Sreeram, and Santosh Pande, Georgia Institute of Technology
Paper in HTML | PDF | Slides
A Case for System Support for Concurrency Exceptions
Luis Ceze, Joseph Devietti, and Brandon Lucia, University of Washington; Shaz Qadeer, Microsoft Research
Paper in HTML | PDF
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| 1:30 p.m.–2:30 p.m. Workshop Lunch |
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| 2:30 p.m.–4:30 p.m. |
Monday |
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Applications and Tools
Parallelizing the Web Browser
Christopher Grant Jones, Rose Liu, Leo Meyerovich, Krste Asanović, and Rastislav Bodik, University of California, Berkeley
Paper in HTML | PDF
Exploring the Limits of Disjoint Access Parallelism
Amitabha Roy and Steven Hand, University of Cambridge; Tim Harris, Microsoft Research
Paper in HTML | PDF
Parallel Search on Video Cards
Tim Kaldewey, Jeff Hagen, Andrea Di Blas, and Eric Sedlar, Oracle Server Technologies—Special Projects
Paper in HTML | PDF
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| 4:30 p.m.–5:00 p.m. Break |
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| 5:00 p.m.–6:30 p.m. |
Monday |
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Panel Session
Parallel Computing in Real-Time Interactive Music and Media Computing
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| 7:00 p.m.–8:30 p.m. Dinner Reception |
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| Sunday, March 29 | Monday, March 30 | Tuesday, March 31
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| Tuesday, March 31 |
| 8:00 a.m.–9:00 a.m. Continental Breakfast |
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| 9:00 a.m.–11:00 a.m. |
Tuesday |
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Operating Systems and Middleware
Tessellation: Space-Time Partitioning in a Manycore Client OS
Rose Liu, Kevin Klues, and Sarah Bird, University of California at Berkeley; Steven Hofmeyr, Lawrence Berkeley National Laboratory; Krste Asanović and John Kubiatowicz, University of California at Berkeley
Paper in HTML | PDF | Slides
Lithe: Enabling Efficient Composition of Parallel Libraries
Heidi Pan, Massachusetts Institute of Technology; Benjamin Hindman and Krste Asanović, University of California, Berkeley
Paper in HTML | PDF | Slides
Energy-efficient Parallel Software for Mobile Hand-held Devices
Antti P. Miettinen, Nokia Research Center; Vesa Hirvisalo, Helsinki University of Technology
Paper in HTML | PDF | Slides
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| 11:00 a.m.–11:30 a.m. Break |
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| 11:30 a.m.–1:30 p.m. |
Tuesday |
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Transactional Memory
Lightweight Software Transactions for Games
Alexandro Baldassin, State University of Campinas, Brazil; Sebastian Burckhardt, Microsoft Research, Redmond
Paper in HTML | PDF
Exceptions and Transactions in C++
Ali-Reza Adl-Tabatabai, Intel Corporation; Victor Luchangco, Virendra J. Marathe, and Mark Moir, Sun Microsystems Laboratories; Ravi Narayanaswamy and Yang Ni, Intel Corporation; Dan Nussbaum, Sun Microsystems Laboratories; Xinmin Tian and Adam Welc, Intel Corporation; Peng Wu, IBM Research
Paper in PDF | Slides
Transactional Memory Should Be an Implementation Technique, Not a Programming Interface
Hans-J. Boehm, HP Laboratories
Paper in HTML | PDF | Slides
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| 1:30 p.m.–2:30 p.m. Workshop Lunch |
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| 2:30 p.m.–4:30 p.m. |
Tuesday |
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Models and Paradigms II
New Abstractions for Data Parallel Programming
James C. Brodman, University of Illinois at Urbana-Champaign; Basilio B. Fraguela, Universidade da Coruña, Spain; María J. Garzarán and David Padua, University of Illinois at Urbana-Champaign
Paper in HTML | PDF | Slides
Ease of Use with Concurrent Collections (CnC)
Kathleen Knobe, Intel
Paper in PDF
Optimizing Collective Communication on Multicores
Rajesh Nishtala and Katherine A. Yelick, University of California, Berkeley
Paper in HTML | PDF
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| 4:30 p.m.–4:45 p.m. |
Tuesday |
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Wrap-up
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