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Scheduling for Reduced CPU Energy
Mark Weiser, Brent Welch, Alan Demers, Scott Shenker, Xerox PARC
The energy usage of computer systems is becoming more important, especially for battery operated systems. Displays, disks, and cpus, in that order, use the most energy. Reducing the energy used by displays and disks has been studied elsewhere; this paper considers a new method for reducing the energy used by the cpu. We introduce a new metric for cpu energy performance, millions-of-instructions-per-joule (MIPJ). We examine a class of methods to reduce MIPJ that are characterized by dynamic control of system clock speed by the operating system scheduler. Reducing clock speed alone does not reduce MIPJ, since to do the same work the system must run longer. However, a number of methods are available for reducing energy with reduced clock-speed, such as reducing the voltage [Chandrakasan et al 1992][Horowitz 1993] or using reversible [Younis and Knight 1993] or adiabatic logic [Athas et al 1994].
What are the right scheduling algorithms for taking advantage of reduced clock-speed, especially in the presence of applications demanding ever more instructions-per-second? We consider several methods for varying the clock speed dynamically under control of the operating system, and examine the performance of these methods against workstation traces. The primary result is that by adjusting the clock speed at a fine grain, substantial CPU energy can be saved with a limited impact on performance.
author = {Mark Weiser and Brent Welch and Alan Demers and Scott Shenker},
title = {Scheduling for Reduced {CPU} Energy},
booktitle = {First Symposium on Operating Systems Design and Implementation (OSDI 94)},
year = {1994},
address = {Monterey, CA},
url = {https://www.usenix.org/conference/osdi-94/scheduling-reduced-cpu-energy},
publisher = {USENIX Association},
month = nov
}
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