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WORKSHOP PROGRAM
Session papers are available to workshop registrants immediately and to everyone beginning June 14, 2010.
SUNDAY | MONDAY | TUESDAY
The workshop will take place on the Clark Kerr Campus at the University of California, Berkeley. All sessions will be held in the Joseph Wood Krutch Theatre unless otherwise noted.
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Sunday, June 13, 2010
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5:30 p.m.–7:00 p.m. |
Dinner,
Dining Hall
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Monday, June 14, 2010
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7:30 a.m.–8:30 a.m. Breakfast, Dining Hall
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8:30 a.m.–10:00 a.m. |
Session Chair: David Patterson, University of California, Berkeley
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Towards Parallelizing the Layout Engine of Firefox
Carmen Badea, University of California, Irvine; Mohammad R. Haghighat, Intel Corporation; Alex Nicolau and Alexander V. Veidenbaum, University of California, Irvine
Read the Abstract | Full paper | Slides
Opportunities and Challenges of Parallelizing Speech Recognition
Jike Chong, University of California, Berkeley; Gerald Friedland, Adam Janin, Nelson Morgan, and Chris Oei, International Computer Science Institute
Read the Abstract | Full paper | Slides
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10:00 a.m.–10:30 a.m. Break
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10:30 a.m.–12:30 p.m. |
Session Chair: Alexandra Fedorova, Simon Fraser University
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A Balanced Programming Model for Emerging Heterogeneous Multicore Systems
Wei Liu, Brian Lewis, Xiaocheng Zhou, Hu Chen, Ying Gao, Shoumeng Yan, Sai Luo, and Bratin Saha, Intel Corporation
Read the Abstract | Full paper | Slides
Collaborative Threads: Exposing and Leveraging Dynamic Thread State for Efficient Computation
Kaushik Ravichandran, Romain Cledat, and Santosh Pande, Georgia Institute of Technology
Read the Abstract | Full paper | Slides
Structured Parallel Programming with Deterministic Patterns
Michael D. McCool, Intel
Read the Abstract | Full paper | Slides
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12:30 p.m.–2:00 p.m. Workshop Luncheon with Discussion Topic Tables, Dining Hall
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2:00 p.m.–4:00 p.m. |
Session Chair: Mendel Rosenblum, Stanford University
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Separating Functional and Parallel Correctness using Nondeterministic Sequential Specifications
Jacob Burnim, George Necula, and Koushik Sen, University of California, Berkeley
Read the Abstract | Full paper | Slides
Synchronization via Scheduling: Managing Shared State in Video Games
Micah J Best, Shane Mottishaw, Craig Mustard, Mark Roth, and Alexandra Fedorova, Simon Fraser University, Canada; Andrew Brownsword, Electronic Arts Blackbox, Canada
Read the Abstract | Full paper
Get the Parallelism out of My Cloud
Karthikeyan Sankaralingam and Remzi H. Arpaci-Dusseau, University of Wisconsin—Madison
Read the Abstract | Full paper | Slides
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4:00 p.m.–4:30 p.m. Break |
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4:30 p.m.–5:00 p.m. |
Poster Previews, Dining Hall
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5:00 p.m.–8:00 p.m. |
Poster Session and Reception, Dining Hall
Session Chair: David Patterson, University of California, Berkeley
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See the complete list of posters.
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8:00 p.m.–10:00 p.m. |
Informal Lubricated Discussions, Rooms 102 and 104
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Tuesday, June 15, 2010
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7:30 a.m.–8:30 a.m. Breakfast, Dining Hall
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8:30 a.m.–10:00 a.m. |
Session Chair: Geoff Lowney, Intel
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Dynamic Processors Demand Dynamic Operating Systems
Sankaralingam Panneerselvam and Michael M. Swift, University of Wisconsin—Madison
Read the Abstract | Full paper | Slides
Design Principles for End-to-End Multicore Schedulers
Simon Peter and Adrian Schüpbach, ETH Zurich; Paul Barham, Microsoft Research, Cambridge; Andrew Baumann, ETH Zurich; Rebecca Isaacs and Tim Harris, Microsoft Research, Cambridge; Timothy Roscoe, ETH Zurich
Read the Abstract | Full paper | Slides
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10:00 a.m.–10:30 a.m. Break
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10:30 a.m.–12:30 p.m. |
Session Chair: Michael McCool, Intel and University of Waterloo
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OoOJava: An Out-of-Order Approach to Parallel Programming
James C. Jenista, Yong hun Eom, and Brian Demsky, University of California, Irvine
Read the Abstract | Full paper | Slides
User-Defined Distributions and Layouts in Chapel: Philosophy and Framework
Bradford L. Chamberlain, Steven J. Deitz, David Iten, and Sung-Eun Choi, Cray Inc.
Read the Abstract | Full paper | Slides
On the Limits of GPU Acceleration
Richard Vuduc, Aparna Chandramowlishwaran, Jee Choi, Murat (Efe) Guney, and Aashay Shringarpure, Georgia Institute of Technology
Read the Abstract | Full paper | Slides
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12:30 p.m.–2:00 p.m. Workshop Luncheon with Discussion Topic Tables, Dining Hall
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2:00 p.m.–4:00 p.m. |
Session Chair: Richard Vuduc, Georgia Institute of Technology
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Gossamer: A Lightweight Programming Framework for Multicore Machines
Joseph A. Roback and Gregory R. Andrews, The University of Arizona, Tucson
Read the Abstract | Full paper | Slides
Reflective Parallel Programming: Extensible and High-Level Control of Runtime, Compiler, and Application Interaction
Nicholas D. Matsakis and Thomas R. Gross, ETH Zurich
Read the Abstract | Full paper | Slides
Task Superscalar: Using Processors as Functional Units
Yoav Etsion, Barcelona Supercomputing Center; Alex Ramirez, Barcelona Supercomputing Center and Universitat Politècnica de Catalunya; Rosa M. Badia, Barcelona Supercomputing Center; Eduard Ayguade, Jesus Labarta, and Mateo Valero, Barcelona Supercomputing Center and Universitat Politècnica de Catalunya
Read the Abstract | Full paper | Slides
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4:00 p.m.–4:10 p.m. |
Wrap-Up
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